Parameters
| ARCH_OPTION |
de5a_area_A10 |
| C_CSR_AXI_ADDR_WIDTH |
11 |
| C_CSR_AXI_DATA_WIDTH |
32 |
| C_DDR_AXI_ADDR_WIDTH |
32 |
| C_DDR_AXI_DATA_WIDTH |
512 |
| C_DDR_AXI_BURST_WIDTH |
4 |
| C_DDR_AXI_THREAD_ID_WIDTH |
2 |
| C_OMNI_CAP_TYPE |
949 |
| C_OMNI_CAP_VERSION |
1 |
| C_OMNI_CAP_SIZE |
2048 |
| C_OMNI_CAP_ID_ASSOCIATED |
0 |
| C_OMNI_CAP_ID_COMPONENT |
0 |
| C_OMNI_CAP_IRQ |
255 |
| C_OMNI_CAP_TAG |
0 |
| C_OMNI_CAP_IRQ_ENABLE_EN |
0 |
| C_OMNI_CAP_IRQ_ENABLE |
0 |
| C_OMNI_CAP_IRQ_STATUS_EN |
0 |
| C_OMNI_CAP_IRQ_STATUS |
0 |
| deviceFamily |
UNKNOWN |
| generateLegacySim |
false |
|