Info: Generated by version: 24.3 build 212
Info: Starting: Create block symbol file (.bsf)
Info: qsys-generate /home/ekd/ekd_research/pet_reconstruction/python/openvino/demo/quartus/ip/pet_reconstruction_ip.ip --block-symbol-file --output-directory=/home/ekd/ekd_research/pet_reconstruction/python/openvino/demo/quartus/ip/pet_reconstruction_ip --family="Arria 10" --part=10AX115N2F45E1SG
Info: Finished: Create block symbol file (.bsf)
Info: 
Info: Starting: Create HDL design files for synthesis
Info: qsys-generate /home/ekd/ekd_research/pet_reconstruction/python/openvino/demo/quartus/ip/pet_reconstruction_ip.ip --synthesis=VERILOG --output-directory=/home/ekd/ekd_research/pet_reconstruction/python/openvino/demo/quartus/ip/pet_reconstruction_ip --family="Arria 10" --part=10AX115N2F45E1SG
Info: pet_reconstruction_ip: "Transforming system: pet_reconstruction_ip"
Info: pet_reconstruction_ip: "Naming system components in system: pet_reconstruction_ip"
Info: pet_reconstruction_ip: "Processing generation queue"
Info: pet_reconstruction_ip: "Generating: pet_reconstruction_ip"
Info: pet_reconstruction_ip: "Generating: intel_ai_ip"
Info: pet_reconstruction_ip: Done "pet_reconstruction_ip" with 2 modules, 320 files
Info: Finished: Create HDL design files for synthesis
Info: Starting: Generate IP Core Documentation
Info: No documentation filesets were found for components in pet_reconstruction_ip. No files generated.
Info: Finished: Generate IP Core Documentation