ura/%25252525253fid%25252525253d0f7acbddf97ce93a07cd46fdbe81cb0208c7e5c0&id2%25252525253da51bde729f6885967b1a4d3d72c0c7b7576273e0%252525253fid%252525253d0f7acbddf97ce93a07cd46fdbe81cb0208c7e5c0%2525253fid%2525253d0f7acbddf97ce93a07cd46fdbe81cb0208c7e5c0%25253fid%25253da51bde729f6885967b1a4d3d72c0c7b7576273e0%253fid%253d6df5e119d64a95a8c1b1ab1ada1cbc9b9d248505?h=master, branch masterSVM Implementation in Python, C and Verilog