ura/OASIS/c%2525252525252525253fid%2525252525252525253db621f72a746343d302c0673616fc84f46800ebaf&id2%2525252525252525253d787c5e1afa5d8a0295f644b1bc0eaba2e4bd8554%25252525252525253fid%25252525252525253db621f72a746343d302c0673616fc84f46800ebaf%252525252525253fid%252525252525253d787c5e1afa5d8a0295f644b1bc0eaba2e4bd8554%2525252525253fid%2525252525253d1e556e8b12390894394df8b2cfdaf82fe69e4dff%25252525253fid%25252525253d1e556e8b12390894394df8b2cfdaf82fe69e4dff&id2%25252525253d42553c4e5fac5f94088abc9f3ed617a4a8dfd907%252525253fid%252525253d1e556e8b12390894394df8b2cfdaf82fe69e4dff&id2%252525253d42553c4e5fac5f94088abc9f3ed617a4a8dfd907%2525253fid%2525253d1e556e8b12390894394df8b2cfdaf82fe69e4dff%25253fid%25253d1e556e8b12390894394df8b2cfdaf82fe69e4dff%253fid%253d1e556e8b12390894394df8b2cfdaf82fe69e4dff%3fid%3d42553c4e5fac5f94088abc9f3ed617a4a8dfd907?h=master, branch masterSVM Implementation in Python, C and Verilog