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| author | Eric Dao <eric@erickhangdao.com> | 2025-03-10 17:54:31 -0400 |
|---|---|---|
| committer | Eric Dao <eric@erickhangdao.com> | 2025-03-10 17:54:31 -0400 |
| commit | ab224e2e6ba65f5a369ec392f99cd8845ad06c98 (patch) | |
| tree | a1e757e9341863ed52b8ad4c5a1c45933aab9da4 /python/openvino/demo/quartus/ip/pet_reconstruction_ip/pet_reconstruction_ip.ppf | |
| parent | 40da1752f2c8639186b72f6838aa415e854d0b1d (diff) | |
| download | thesis-master.tar.gz thesis-master.tar.bz2 thesis-master.zip | |
Diffstat (limited to 'python/openvino/demo/quartus/ip/pet_reconstruction_ip/pet_reconstruction_ip.ppf')
| -rw-r--r-- | python/openvino/demo/quartus/ip/pet_reconstruction_ip/pet_reconstruction_ip.ppf | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/python/openvino/demo/quartus/ip/pet_reconstruction_ip/pet_reconstruction_ip.ppf b/python/openvino/demo/quartus/ip/pet_reconstruction_ip/pet_reconstruction_ip.ppf new file mode 100644 index 0000000..a8e1b92 --- /dev/null +++ b/python/openvino/demo/quartus/ip/pet_reconstruction_ip/pet_reconstruction_ip.ppf @@ -0,0 +1,61 @@ +<?xml version="1.0" encoding="UTF-8"?> +<pinplan + variation_name="intel_ai_ip_0" + megafunction_name="INTEL_AI_IP" + intended_family="Arria 10" + specifies="all_ports"> + <global> + <pin name="dla_clk" direction="input" scope="external" /> + <pin name="ddr_clk" direction="input" scope="external" /> + <pin name="irq_clk" direction="input" scope="external" /> + <pin name="dla_resetn" direction="input" scope="external" /> + <pin name="csr_axi_awaddr[10..0]" direction="input" scope="external" /> + <pin name="csr_axi_awvalid" direction="input" scope="external" /> + <pin name="csr_axi_awready" direction="output" scope="external" /> + <pin name="csr_axi_wdata[31..0]" direction="input" scope="external" /> + <pin name="csr_axi_wready" direction="output" scope="external" /> + <pin name="csr_axi_wvalid" direction="input" scope="external" /> + <pin name="csr_axi_wstrb[3..0]" direction="input" scope="external" /> + <pin name="csr_axi_bresp[1..0]" direction="output" scope="external" /> + <pin name="csr_axi_bvalid" direction="output" scope="external" /> + <pin name="csr_axi_bready" direction="input" scope="external" /> + <pin name="csr_axi_rdata[31..0]" direction="output" scope="external" /> + <pin name="csr_axi_rresp[1..0]" direction="output" scope="external" /> + <pin name="csr_axi_rvalid" direction="output" scope="external" /> + <pin name="csr_axi_rready" direction="input" scope="external" /> + <pin name="csr_axi_araddr[10..0]" direction="input" scope="external" /> + <pin name="csr_axi_arvalid" direction="input" scope="external" /> + <pin name="csr_axi_arready" direction="output" scope="external" /> + <pin name="csr_axi_awprot[2..0]" direction="input" scope="external" /> + <pin name="csr_axi_arprot[2..0]" direction="input" scope="external" /> + <pin name="ddr_axi_awvalid" direction="output" scope="external" /> + <pin name="ddr_axi_awprot[2..0]" direction="output" scope="external" /> + <pin name="ddr_axi_awlen[7..0]" direction="output" scope="external" /> + <pin name="ddr_axi_awready" direction="input" scope="external" /> + <pin name="ddr_axi_awsize[2..0]" direction="output" scope="external" /> + <pin name="ddr_axi_awburst[1..0]" direction="output" scope="external" /> + <pin name="ddr_axi_arvalid" direction="output" scope="external" /> + <pin name="ddr_axi_arprot[2..0]" direction="output" scope="external" /> + <pin name="ddr_axi_arlen[7..0]" direction="output" scope="external" /> + <pin name="ddr_axi_arready" direction="input" scope="external" /> + <pin name="ddr_axi_arsize[2..0]" direction="output" scope="external" /> + <pin name="ddr_axi_arburst[1..0]" direction="output" scope="external" /> + <pin name="ddr_axi_rvalid" direction="input" scope="external" /> + <pin name="ddr_axi_rready" direction="output" scope="external" /> + <pin name="ddr_axi_wvalid" direction="output" scope="external" /> + <pin name="ddr_axi_wlast" direction="output" scope="external" /> + <pin name="ddr_axi_wready" direction="input" scope="external" /> + <pin name="ddr_axi_bvalid" direction="input" scope="external" /> + <pin name="ddr_axi_bready" direction="output" scope="external" /> + <pin name="ddr_axi_awaddr[31..0]" direction="output" scope="external" /> + <pin name="ddr_axi_awid[1..0]" direction="output" scope="external" /> + <pin name="ddr_axi_araddr[31..0]" direction="output" scope="external" /> + <pin name="ddr_axi_arid[1..0]" direction="output" scope="external" /> + <pin name="ddr_axi_rdata[511..0]" direction="input" scope="external" /> + <pin name="ddr_axi_rid[1..0]" direction="input" scope="external" /> + <pin name="ddr_axi_wdata[511..0]" direction="output" scope="external" /> + <pin name="ddr_axi_wstrb[63..0]" direction="output" scope="external" /> + <pin name="ddr_axi_bid[1..0]" direction="input" scope="external" /> + <pin name="irq_level" direction="output" scope="external" /> + </global> +</pinplan> |