1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
|
// Copyright 2020-2022 Intel Corporation.
//
// This software and the related documents are Intel copyrighted materials,
// and your use of them is governed by the express license under which they
// were provided to you ("License"). Unless the License provides otherwise,
// you may not use, modify, copy, publish, distribute, disclose or transmit
// this software or the related documents without Intel's prior written
// permission.
//
// This software and the related documents are provided as is, with no express
// or implied warranties, other than those that are expressly stated in the
// License.
`resetall
`undefineall
`default_nettype none
module dla_lt_mux #(
parameter int VALUE_WIDTH,
parameter int NOUTPUT,
parameter int SELECT_WIDTH=$clog2(NOUTPUT)
) (
input wire i_valid,
input wire [SELECT_WIDTH:0] i_select,
input wire [VALUE_WIDTH-1:0] i_value,
output logic [VALUE_WIDTH-1:0] o_mux_output [NOUTPUT-1:0]
);
always_comb
begin
o_mux_output <= '{default: '0};
if (i_valid)
begin
o_mux_output[i_select] <= i_value;
end
end
endmodule
|
